Vlsi List


1.       Design and Implementation of RFID  Protocol using Verilog.
2.       Implementing Voice Signal in Traffic Light controller using Verilog..
3.       Design and Implementation of WI-Fi Mac Transmitter.
4.       Implementation of universal serial bus (USB) BLASTER using VHDL.
5.       Design and implementation of advanced encryption standard (AES).
6.       Design of Secure Hash Algorithm based on FPGA.
7.       Design and implementation of Universal asynchronous Receiver Transmitter (USART) .
8.       Design and Implementation of Central Processing Unit using VHDL.
9.       Implementation of Electronic Voting Machine (EVM) using VHDL.
10.   Design and Implementation of Serial Peripheral Interface Using VHDL.
11.   Implementation of general purpose processor using VHDL.
12.   FPGA based CAN Bus Controller design using Verilog.
13.   Design and Implementation of Bluetooth .          
14.   Design and Implementation of Vending Machine using VHDL.
15.   Design and Implementation of Elevator using VHDL.
16.   Design and Implementation of VGA  using Verilog.
17.   Design and Implementation of UART  using Verilog/VHDL .
18.   8/12/16/32 Cyclic Redundancy Check Error Check using Verilog.
19.   Superscalar Power Efficient Fast Fourier Transform FFT Architecture.
20.   High-Speed Architecture for Reed-Solomon Decoder/Encoder.
21.   8/16/32 Point Fast Fourier Transform Algorithm using FPGA with Verilog/VHDL.
22.   VLSI Implementation of Booths Algorithm using FPGA with VHDL.
23.   low power booth algorithm with Verilog.
24.   Fuzzy based PID Controller using VHDL for Transportation Application.
25.   VLSI Design & Implementation of Viterbi Algorithm-Encoder/Decoder using FPGA .
26.   Power Optimization of Linear Feedback Shift Register (LFSR) for Low Power BIST.
27.   PCI Express Interface Controller using FPGA.
28.   Design and Implementation of Clock Divider  using VHDL.
29.   Design and Implementation of Digital Code Lock using VHDL.
30.   Design and Implementation of Double  Sequence Detector using VHDL.